Page: Getting Started with Wi-Fi HaLow Module for XIAO
Source: sites/en/docs/Network/WiFi-Halow/wifi-halow-module-for-xiao.md
The problem
The Hardware Overview table (line 45) says:
| Characteristic |
Value |
Unit |
| Operating Voltage |
3.3 |
V |
This board actually has two separate supply inputs, and the page documents only one of them.
Per the schematic and module spec that this same page links in its Resources section:
- 3V3 pad →
MOD_3V3 → VBAT + VDD_IO (the module's digital rails), via ferrite bead FB1.
- 5V pad →
MOD_5V → VDD_FEM, the front-end module / TX power-amplifier rail, via ferrite bead FB2.
Typ. 5 V (range 3.0–5.25 V) per the Quectel FGH100M-H specification. It is not derived from 3V3.
Why it matters
If the module is plugged onto a XIAO, both rails come from the expansion connector and nobody notices. But when the board is wired to a host over the pad interface — e.g. a Raspberry Pi over SPI, which several community threads are doing — people follow the "3.3 V" spec and wire only 3V3 + GND.
The result is a uniquely nasty failure mode:
- Chip enumerates, loads firmware, brings up a full S1G phy ✓
- RX works — peers visible at strong signal ✓
- TX is dead — roughly 40 dB below what the driver thinks it is commanding; no peer ever sees the node, even at 1-inch antenna spacing ✗
- No error is reported anywhere, and total system current barely rises during TX (the PA cannot draw)
It imitates a bad antenna, a brown-out, or a driver bug, and it costs people weeks.
Suggested fix
Amend the table row:
| Operating Voltage | 3.3 (digital: VBAT / VDD_IO) + 5.0 (RF front-end: VDD_FEM) | V |
and add an admonition under the table (matching the :::note / :::tip style already used on this page):
:::caution Both supply rails are required
This board has **two separate supply inputs**. The **3V3 pad** feeds the module's digital rails (VBAT, VDD_IO). The **5V pad** feeds **VDD_FEM** — the RF front-end (TX power amplifier) rail — via ferrite bead FB2 (typ. 5 V, range 3.0–5.25 V per the FGH100M-H specification). It is **not** derived from 3V3.
When the module is plugged onto a XIAO, both rails come from the expansion connector automatically. **When wiring this board to a host over the pad interface (for example a Raspberry Pi over SPI), you must connect 5V, 3V3 and GND.** With only 3V3 wired, the module enumerates, loads firmware and **receives** normally, but **cannot transmit at rated power** — TX is roughly 40 dB low, other stations never see it, and system current draw stays flat during TX. No fault is reported.
:::
Full diagnostic write-up and the board-side pad map, on the Morse Micro forum:
https://community.morsemicro.com/t/psa-seeed-xiao-halow-fgh100m-h-enumerates-fine-rx-fine-tx-dead-wire-the-5v-pad-vdd-fem/1824
Happy to open a PR for the English page if you'd prefer — though since the wiki auto-translates, it may be cleaner for the edit to come from your side so the es/ja/pt-BR/zh-CN copies stay in sync.
Page: Getting Started with Wi-Fi HaLow Module for XIAO
Source:
sites/en/docs/Network/WiFi-Halow/wifi-halow-module-for-xiao.mdThe problem
The Hardware Overview table (line 45) says:
This board actually has two separate supply inputs, and the page documents only one of them.
Per the schematic and module spec that this same page links in its Resources section:
MOD_3V3→ VBAT + VDD_IO (the module's digital rails), via ferrite bead FB1.MOD_5V→ VDD_FEM, the front-end module / TX power-amplifier rail, via ferrite bead FB2.Typ. 5 V (range 3.0–5.25 V) per the Quectel FGH100M-H specification. It is not derived from 3V3.
Why it matters
If the module is plugged onto a XIAO, both rails come from the expansion connector and nobody notices. But when the board is wired to a host over the pad interface — e.g. a Raspberry Pi over SPI, which several community threads are doing — people follow the "3.3 V" spec and wire only 3V3 + GND.
The result is a uniquely nasty failure mode:
It imitates a bad antenna, a brown-out, or a driver bug, and it costs people weeks.
Suggested fix
Amend the table row:
| Operating Voltage | 3.3 (digital: VBAT / VDD_IO) + 5.0 (RF front-end: VDD_FEM) | V |
and add an admonition under the table (matching the
:::note/:::tipstyle already used on this page):Full diagnostic write-up and the board-side pad map, on the Morse Micro forum:
https://community.morsemicro.com/t/psa-seeed-xiao-halow-fgh100m-h-enumerates-fine-rx-fine-tx-dead-wire-the-5v-pad-vdd-fem/1824
Happy to open a PR for the English page if you'd prefer — though since the wiki auto-translates, it may be cleaner for the edit to come from your side so the es/ja/pt-BR/zh-CN copies stay in sync.