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Experimental std::simd
#6732
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Experimental std::simd
#6732
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miscco
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This is not using SIMD on the host, is there any reason for that?
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because this is the first PR. Secondly, because we care more about GPU than CPU. Third, the feature is also experimental for other std libraries. |
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🥳 CI Workflow Results🟩 Finished in 15m 27s: Pass: 100%/42 | Total: 2h 47m | Max: 14m 49s | Hits: 99%/20431See results here. |
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Motivations
Modern GPU architectures are increasingly exposing fine-grained, single-thread SIMD capabilities to maximize throughput within individual CUDA threads. While GPU programming model strongly focuses on the SIMT model, newer hardware relies on specialized SIMD operations to saturate execution units. Some examples include:
int16_tSIMD instructions DPX.FADDx2,FMULx2,FMAx2.Bfloat16x2andHalfx2intrinsics.IADD3).__dp4a.vabsdiff4.C++26 std::simd provides a standardized abstraction to write vectorized code. This is a great opportunity to unify customized code to handle all variants and reduce CUDA software fragmentation. By adopting
std::simd-like API, developers can write a single vectorized kernel that compiles to the optimal instructions for any GPU architecture.PR Goals and Non-Goals
The PR aims to provide a basic implementation of
std::simdand provide the foundation for future optimizations and extensions.Advanced math and bit operations, e.g.
std::abs,std::pow,std::popcountetc. , as well asstd::complexbinding, are outside the scope of the first PR.Non-Goals:
std::simd.Implementation Notes
The implementation is based on the LLVM code experimental/__simd and extended to support the related C++ proposals:
Some optimizations are already exploited in the CCCL code, for example thread_simd.h and thread_reduce.h. They will gradually added to the implementation.
Partially address #30