@@ -908,8 +908,6 @@ static inline void nvme_fill_static_params_control(xlio_mlx5_wqe_ctrl_seg *cseg,
908908 uint32_t producer_index, uint32_t qpn,
909909 uint32_t tisn, uint8_t fence_flags)
910910{
911- memset (cseg, 0 , sizeof (*cseg));
912- memset (ucseg, 0 , sizeof (*ucseg));
913911 cseg->opmod_idx_opcode =
914912 htobe32 (((producer_index & 0xffff ) << 8 ) | MLX5_OPCODE_UMR |
915913 (MLX5_CTRL_SEGMENT_OPC_MOD_UMR_NVMEOTCP_TIS_STATIC_PARAMS << 24 ));
@@ -926,7 +924,6 @@ static inline void nvme_fill_static_params_transport_params(
926924 mlx5_wqe_transport_static_params_seg *params, uint32_t config)
927925
928926{
929- memset (params, 0 , sizeof (*params));
930927 void *ctx = params->ctx ;
931928
932929 DEVX_SET (transport_static_params, ctx, const_1, 1 );
@@ -949,7 +946,6 @@ static inline void nvme_fill_progress_wqe(mlx5e_set_nvmeotcp_progress_params_wqe
949946 uint32_t producer_index, uint32_t qpn, uint32_t tisn,
950947 uint32_t tcp_seqno, uint8_t fence_flags)
951948{
952- memset (wqe, 0 , sizeof (*wqe));
953949 auto cseg = &wqe->ctrl .ctrl ;
954950
955951 size_t progres_params_ds = DIV_ROUND_UP (sizeof (*wqe), MLX5_SEND_WQE_DS);
@@ -975,11 +971,16 @@ void hw_queue_tx::nvme_set_static_context(xlio_tis *tis, uint32_t config)
975971 auto *cseg = wqebb_get<xlio_mlx5_wqe_ctrl_seg *>(0U );
976972 auto *ucseg = wqebb_get<xlio_mlx5_wqe_umr_ctrl_seg *>(0U , sizeof (*cseg));
977973
974+ memset (cseg, 0 ,
975+ std::max<size_t >(WQEBB,
976+ sizeof (xlio_mlx5_wqe_ctrl_seg) + sizeof (xlio_mlx5_wqe_umr_ctrl_seg)));
977+
978978 nvme_fill_static_params_control (cseg, ucseg, m_sq_wqe_counter, m_mlx5_qp.qpn , tis->get_tisn (),
979979 0 );
980- memset (wqebb_get<void *>(1U ), 0 , sizeof (mlx5_mkey_seg));
980+ memset (wqebb_get<void *>(1U ), 0 , std::max< size_t >(WQEBB, sizeof (mlx5_mkey_seg) ));
981981
982982 auto *params = wqebb_get<mlx5_wqe_transport_static_params_seg *>(2U );
983+ memset (params, 0 , std::max<size_t >(WQEBB, sizeof (mlx5_wqe_transport_static_params_seg)));
983984 nvme_fill_static_params_transport_params (params, config);
984985 store_current_wqe_prop (nullptr , SQ_CREDITS_UMR, tis);
985986 ring_doorbell (MLX5E_TRANSPORT_SET_STATIC_PARAMS_WQEBBS);
@@ -989,6 +990,7 @@ void hw_queue_tx::nvme_set_static_context(xlio_tis *tis, uint32_t config)
989990void hw_queue_tx::nvme_set_progress_context (xlio_tis *tis, uint32_t tcp_seqno)
990991{
991992 auto *wqe = reinterpret_cast <mlx5e_set_nvmeotcp_progress_params_wqe *>(m_sq_wqe_hot);
993+ memset (wqe, 0 , std::max<size_t >(WQEBB, sizeof (mlx5e_set_nvmeotcp_progress_params_wqe)));
992994 nvme_fill_progress_wqe (wqe, m_sq_wqe_counter, m_mlx5_qp.qpn , tis->get_tisn (), tcp_seqno,
993995 MLX5_FENCE_MODE_INITIATOR_SMALL);
994996 store_current_wqe_prop (nullptr , SQ_CREDITS_SET_PSV, tis);
@@ -1317,7 +1319,7 @@ inline void hw_queue_tx::tls_post_progress_params_wqe(xlio_ti *ti, uint32_t tis_
13171319 uint8_t opmod =
13181320 is_tx ? MLX5_OPC_MOD_TLS_TIS_PROGRESS_PARAMS : MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS;
13191321
1320- memset (wqe, 0 , sizeof (*wqe ));
1322+ memset (wqe, 0 , std::max< size_t >(WQEBB, sizeof (mlx5_set_tls_progress_params_wqe) ));
13211323
13221324#define PROGRESS_PARAMS_DS_CNT DIV_ROUND_UP (sizeof (*wqe), MLX5_SEND_WQE_DS)
13231325
@@ -1346,7 +1348,7 @@ inline void hw_queue_tx::tls_get_progress_params_wqe(xlio_ti *ti, uint32_t tirn,
13461348 struct xlio_mlx5_seg_get_psv *psv = &wqe->psv ;
13471349 uint8_t opmod = MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS;
13481350
1349- memset (wqe, 0 , sizeof (*wqe ));
1351+ memset (wqe, 0 , std::max< size_t >(WQEBB, sizeof (mlx5_get_tls_progress_params_wqe) ));
13501352
13511353#define PROGRESS_PARAMS_DS_CNT DIV_ROUND_UP (sizeof (*wqe), MLX5_SEND_WQE_DS)
13521354
@@ -1418,7 +1420,7 @@ void hw_queue_tx::post_nop_fence(void)
14181420 struct mlx5_wqe *wqe = reinterpret_cast <struct mlx5_wqe *>(m_sq_wqe_hot);
14191421 struct xlio_mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl ;
14201422
1421- memset (wqe, 0 , sizeof (*wqe ));
1423+ memset (wqe, 0 , std::max< size_t >(WQEBB, sizeof (mlx5_wqe) ));
14221424
14231425 cseg->opmod_idx_opcode = htobe32 (((m_sq_wqe_counter & 0xffff ) << 8 ) | MLX5_OPCODE_NOP);
14241426 cseg->qpn_ds = htobe32 ((m_mlx5_qp.qpn << MLX5_WQE_CTRL_QPN_SHIFT) | 0x01 );
@@ -1440,7 +1442,7 @@ void hw_queue_tx::post_dump_wqe(xlio_tis *tis, void *addr, uint32_t len, uint32_
14401442 uint32_t tisn = tis ? tis->get_tisn () : 0 ;
14411443 uint16_t ds_cnt = sizeof (*wqe) / MLX5_SEND_WQE_DS;
14421444
1443- memset (wqe, 0 , sizeof (*wqe ));
1445+ memset (wqe, 0 , std::max< size_t >(WQEBB, sizeof (mlx5_dump_wqe) ));
14441446
14451447 cseg->opmod_idx_opcode = htobe32 (((m_sq_wqe_counter & 0xffff ) << 8 ) | XLIO_MLX5_OPCODE_DUMP);
14461448 cseg->qpn_ds = htobe32 ((m_mlx5_qp.qpn << MLX5_WQE_CTRL_QPN_SHIFT) | ds_cnt);
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