@@ -975,6 +975,8 @@ void hw_queue_tx::nvme_set_static_context(xlio_tis *tis, uint32_t config)
975975 auto *cseg = wqebb_get<xlio_mlx5_wqe_ctrl_seg *>(0U );
976976 auto *ucseg = wqebb_get<xlio_mlx5_wqe_umr_ctrl_seg *>(0U , sizeof (*cseg));
977977
978+ memset (cseg, 0 , sizeof (mlx5_eth_wqe));
979+
978980 nvme_fill_static_params_control (cseg, ucseg, m_sq_wqe_counter, m_mlx5_qp.qpn , tis->get_tisn (),
979981 0 );
980982 memset (wqebb_get<void *>(1U ), 0 , sizeof (mlx5_mkey_seg));
@@ -989,6 +991,7 @@ void hw_queue_tx::nvme_set_static_context(xlio_tis *tis, uint32_t config)
989991void hw_queue_tx::nvme_set_progress_context (xlio_tis *tis, uint32_t tcp_seqno)
990992{
991993 auto *wqe = reinterpret_cast <mlx5e_set_nvmeotcp_progress_params_wqe *>(m_sq_wqe_hot);
994+ memset (wqe, 0 , sizeof (mlx5_eth_wqe));
992995 nvme_fill_progress_wqe (wqe, m_sq_wqe_counter, m_mlx5_qp.qpn , tis->get_tisn (), tcp_seqno,
993996 MLX5_FENCE_MODE_INITIATOR_SMALL);
994997 store_current_wqe_prop (nullptr , SQ_CREDITS_SET_PSV, tis);
@@ -1317,7 +1320,7 @@ inline void hw_queue_tx::tls_post_progress_params_wqe(xlio_ti *ti, uint32_t tis_
13171320 uint8_t opmod =
13181321 is_tx ? MLX5_OPC_MOD_TLS_TIS_PROGRESS_PARAMS : MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS;
13191322
1320- memset (wqe, 0 , sizeof (*wqe ));
1323+ memset (wqe, 0 , sizeof (mlx5_eth_wqe ));
13211324
13221325#define PROGRESS_PARAMS_DS_CNT DIV_ROUND_UP (sizeof (*wqe), MLX5_SEND_WQE_DS)
13231326
@@ -1346,7 +1349,7 @@ inline void hw_queue_tx::tls_get_progress_params_wqe(xlio_ti *ti, uint32_t tirn,
13461349 struct xlio_mlx5_seg_get_psv *psv = &wqe->psv ;
13471350 uint8_t opmod = MLX5_OPC_MOD_TLS_TIR_PROGRESS_PARAMS;
13481351
1349- memset (wqe, 0 , sizeof (*wqe ));
1352+ memset (wqe, 0 , sizeof (mlx5_eth_wqe ));
13501353
13511354#define PROGRESS_PARAMS_DS_CNT DIV_ROUND_UP (sizeof (*wqe), MLX5_SEND_WQE_DS)
13521355
@@ -1418,7 +1421,7 @@ void hw_queue_tx::post_nop_fence(void)
14181421 struct mlx5_wqe *wqe = reinterpret_cast <struct mlx5_wqe *>(m_sq_wqe_hot);
14191422 struct xlio_mlx5_wqe_ctrl_seg *cseg = &wqe->ctrl ;
14201423
1421- memset (wqe, 0 , sizeof (*wqe ));
1424+ memset (wqe, 0 , sizeof (mlx5_eth_wqe ));
14221425
14231426 cseg->opmod_idx_opcode = htobe32 (((m_sq_wqe_counter & 0xffff ) << 8 ) | MLX5_OPCODE_NOP);
14241427 cseg->qpn_ds = htobe32 ((m_mlx5_qp.qpn << MLX5_WQE_CTRL_QPN_SHIFT) | 0x01 );
@@ -1440,7 +1443,7 @@ void hw_queue_tx::post_dump_wqe(xlio_tis *tis, void *addr, uint32_t len, uint32_
14401443 uint32_t tisn = tis ? tis->get_tisn () : 0 ;
14411444 uint16_t ds_cnt = sizeof (*wqe) / MLX5_SEND_WQE_DS;
14421445
1443- memset (wqe, 0 , sizeof (*wqe ));
1446+ memset (wqe, 0 , sizeof (mlx5_eth_wqe ));
14441447
14451448 cseg->opmod_idx_opcode = htobe32 (((m_sq_wqe_counter & 0xffff ) << 8 ) | XLIO_MLX5_OPCODE_DUMP);
14461449 cseg->qpn_ds = htobe32 ((m_mlx5_qp.qpn << MLX5_WQE_CTRL_QPN_SHIFT) | ds_cnt);
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