Skip to content

Commit ad54a42

Browse files
sholeksandrsholeksandr
committed
hw-mgmgt: kernel 5.10/6.1: patches: Add reset "reset_from_erot" reset cause.
Add reset cause of cpu erot ./system/reset_from_erot FR: 4441226 Bug: 4438900 Signed-off-by: Oleksandr Shamray <[email protected]>
1 parent cf62e3c commit ad54a42

6 files changed

+121
-117
lines changed

‎recipes-kernel/linux/linux-5.10/9005-platform-mellanox-Downstream-Introduce-support-of-Nv.patch‎

Lines changed: 35 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
1-
From 8c0b8789348c70b3530df050a49a3dbbd4afa085 Mon Sep 17 00:00:00 2001
1+
From 3ae636735e2e2581a01bb855b547bdcaa5c07c78 Mon Sep 17 00:00:00 2001
22
From: Vadim Pasternak <[email protected]>
33
Date: Thu, 4 Jan 2024 07:40:04 +0000
4-
Subject: [PATCH 5/5] platform: mellanox: Downstream: Introduce support of
4+
Subject: [PATCH 1/5] platform: mellanox: Downstream: Introduce support of
55
Nvidia next genration L1 tray switch
66

77
Add support for new L1 tray switch node providing L1 connectivity for
@@ -17,11 +17,11 @@ of the all required platform driver.
1717
Signed-off-by: Oleksandr Shamray <[email protected]>
1818
Reviewed-by: Vadim Pasternak <[email protected]>
1919
---
20-
drivers/platform/mellanox/mlx-platform.c | 1119 +++++++++++++++++++++++++++---
21-
1 file changed, 1019 insertions(+), 100 deletions(-)
20+
drivers/platform/mellanox/mlx-platform.c | 1125 ++++++++++++++++++++--
21+
1 file changed, 1025 insertions(+), 100 deletions(-)
2222

2323
diff --git a/drivers/platform/mellanox/mlx-platform.c b/drivers/platform/mellanox/mlx-platform.c
24-
index 4be0f29..8690660 100644
24+
index 4be0f29cc..f33aca457 100644
2525
--- a/drivers/platform/mellanox/mlx-platform.c
2626
+++ b/drivers/platform/mellanox/mlx-platform.c
2727
@@ -53,6 +53,7 @@
@@ -246,7 +246,7 @@ index 4be0f29..8690660 100644
246246
{
247247
.label = "erot1_recovery",
248248
.reg = MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET,
249-
@@ -7012,139 +7151,669 @@ static struct mlxreg_core_platform_data mlxplat_smart_switch_regs_io_data = {
249+
@@ -7012,139 +7151,675 @@ static struct mlxreg_core_platform_data mlxplat_smart_switch_regs_io_data = {
250250
.counter = ARRAY_SIZE(mlxplat_mlxcpld_smart_switch_regs_io_data),
251251
};
252252

@@ -662,6 +662,12 @@ index 4be0f29..8690660 100644
662662
+ .mode = 0444,
663663
+ },
664664
+ {
665+
+ .label = "reset_from_erot",
666+
+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET,
667+
+ .mask = GENMASK(7, 0) & ~BIT(6),
668+
+ .mode = 0444,
669+
+ },
670+
+ {
665671
+ .label = "reset_erot",
666672
+ .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET,
667673
+ .mask = GENMASK(7, 0) & ~BIT(0),
@@ -1012,7 +1018,7 @@ index 4be0f29..8690660 100644
10121018
.capability = MLXPLAT_CPLD_LPC_REG_TACHO_SPEED_OFFSET,
10131019
},
10141020
};
1015-
@@ -7435,6 +8104,124 @@ static struct mlxreg_core_platform_data mlxplat_xdr_fan_data = {
1021+
@@ -7435,6 +8110,124 @@ static struct mlxreg_core_platform_data mlxplat_xdr_fan_data = {
10161022
.version = 1,
10171023
};
10181024

@@ -1137,15 +1143,15 @@ index 4be0f29..8690660 100644
11371143
/* Watchdog type1: hardware implementation version1
11381144
* (MSN2700, MSN2410, MSN2740, MSN2100 and MSN2140 systems).
11391145
*/
1140-
@@ -7670,6 +8457,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
1146+
@@ -7670,6 +8463,7 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
11411147
case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET:
11421148
case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET:
11431149
case MLXPLAT_CPLD_LPC_REG_LED8_OFFSET:
11441150
+ case MLXPLAT_CPLD_LPC_REG_LED9_OFFSET:
11451151
case MLXPLAT_CPLD_LPC_REG_GP0_OFFSET:
11461152
case MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET:
11471153
case MLXPLAT_CPLD_LPC_REG_GP1_OFFSET:
1148-
@@ -7734,6 +8522,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
1154+
@@ -7734,6 +8528,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
11491155
case MLXPLAT_CPLD_LPC_REG_LC_SN_MASK_OFFSET:
11501156
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
11511157
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
@@ -1154,7 +1160,7 @@ index 4be0f29..8690660 100644
11541160
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
11551161
case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
11561162
case MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET:
1157-
@@ -7755,6 +8545,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
1163+
@@ -7755,6 +8551,8 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
11581164
case MLXPLAT_CPLD_LPC_REG_PWM3_OFFSET:
11591165
case MLXPLAT_CPLD_LPC_REG_PWM4_OFFSET:
11601166
case MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET:
@@ -1163,15 +1169,15 @@ index 4be0f29..8690660 100644
11631169
case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET:
11641170
return true;
11651171
}
1166-
@@ -7797,6 +8589,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
1172+
@@ -7797,6 +8595,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
11671173
case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET:
11681174
case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET:
11691175
case MLXPLAT_CPLD_LPC_REG_LED8_OFFSET:
11701176
+ case MLXPLAT_CPLD_LPC_REG_LED9_OFFSET:
11711177
case MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION:
11721178
case MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET:
11731179
case MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET:
1174-
@@ -7889,6 +8682,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
1180+
@@ -7889,6 +8688,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
11751181
case MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET:
11761182
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
11771183
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
@@ -1181,7 +1187,7 @@ index 4be0f29..8690660 100644
11811187
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
11821188
case MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET:
11831189
case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
1184-
@@ -7948,6 +8744,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
1190+
@@ -7948,6 +8750,9 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
11851191
case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET:
11861192
case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET:
11871193
case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET:
@@ -1191,15 +1197,15 @@ index 4be0f29..8690660 100644
11911197
case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET:
11921198
return true;
11931199
}
1194-
@@ -7990,6 +8789,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
1200+
@@ -7990,6 +8795,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
11951201
case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET:
11961202
case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET:
11971203
case MLXPLAT_CPLD_LPC_REG_LED8_OFFSET:
11981204
+ case MLXPLAT_CPLD_LPC_REG_LED9_OFFSET:
11991205
case MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION:
12001206
case MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET:
12011207
case MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET:
1202-
@@ -8080,6 +8880,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
1208+
@@ -8080,6 +8886,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
12031209
case MLXPLAT_CPLD_LPC_REG_LC_SD_OFFSET:
12041210
case MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET:
12051211
case MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET:
@@ -1209,7 +1215,7 @@ index 4be0f29..8690660 100644
12091215
case MLXPLAT_CPLD_LPC_REG_LC_PWR_ON:
12101216
case MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET:
12111217
case MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT:
1212-
@@ -8133,6 +8936,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
1218+
@@ -8133,6 +8942,9 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
12131219
case MLXPLAT_CPLD_LPC_REG_CONFIG2_OFFSET:
12141220
case MLXPLAT_CPLD_LPC_REG_CONFIG3_OFFSET:
12151221
case MLXPLAT_CPLD_LPC_REG_UFM_VERSION_OFFSET:
@@ -1219,7 +1225,7 @@ index 4be0f29..8690660 100644
12191225
case MLXPLAT_CPLD_LPC_REG_EXT_MIN_OFFSET ... MLXPLAT_CPLD_LPC_REG_EXT_MAX_OFFSET:
12201226
return true;
12211227
}
1222-
@@ -8201,6 +9007,17 @@ static const struct reg_default mlxplat_mlxcpld_regmap_smart_switch[] = {
1228+
@@ -8201,6 +9013,17 @@ static const struct reg_default mlxplat_mlxcpld_regmap_smart_switch[] = {
12231229
MLXPLAT_CPLD_LPC_SM_SW_MASK },
12241230
};
12251231

@@ -1237,7 +1243,7 @@ index 4be0f29..8690660 100644
12371243
struct mlxplat_mlxcpld_regmap_context {
12381244
void __iomem *base;
12391245
};
1240-
@@ -8323,6 +9140,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_smart_switch = {
1246+
@@ -8323,6 +9146,20 @@ static const struct regmap_config mlxplat_mlxcpld_regmap_config_smart_switch = {
12411247
.reg_write = mlxplat_mlxcpld_reg_write,
12421248
};
12431249

@@ -1258,7 +1264,7 @@ index 4be0f29..8690660 100644
12581264
/* Wait completion routine for indirect access for register map */
12591265
static int mlxplat_fpga_completion_wait(struct mlxplat_mlxcpld_regmap_context *ctx)
12601266
{
1261-
@@ -8448,6 +9279,8 @@ static struct spi_board_info *mlxplat_spi;
1267+
@@ -8448,6 +9285,8 @@ static struct spi_board_info *mlxplat_spi;
12621268
static struct pci_dev *lpc_bridge;
12631269
static struct pci_dev *i2c_bridge;
12641270
static struct pci_dev *jtag_bridge;
@@ -1267,7 +1273,7 @@ index 4be0f29..8690660 100644
12671273

12681274
/* Platform default reset function */
12691275
static int mlxplat_reboot_notifier(struct notifier_block *nb, unsigned long action, void *unused)
1270-
@@ -8480,6 +9313,26 @@ static void mlxplat_poweroff(void)
1276+
@@ -8480,6 +9319,26 @@ static void mlxplat_poweroff(void)
12711277
kernel_halt();
12721278
}
12731279

@@ -1294,7 +1300,7 @@ index 4be0f29..8690660 100644
12941300
static int __init mlxplat_register_platform_device(void)
12951301
{
12961302
mlxplat_dev = platform_device_register_simple(MLX_PLAT_DEVICE_NAME, -1,
1297-
@@ -9011,6 +9864,38 @@ static int __init mlxplat_dmi_ng400_hi171_matched(const struct dmi_system_id *dm
1303+
@@ -9011,6 +9870,38 @@ static int __init mlxplat_dmi_ng400_hi171_matched(const struct dmi_system_id *dm
12981304
return mlxplat_register_platform_device();
12991305
}
13001306

@@ -1333,10 +1339,11 @@ index 4be0f29..8690660 100644
13331339
static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
13341340
{
13351341
.callback = mlxplat_dmi_default_wc_matched,
1336-
@@ -9166,6 +10051,40 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
1342+
@@ -9165,6 +10056,40 @@ static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
1343+
DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "HI172"),
13371344
},
13381345
},
1339-
{
1346+
+ {
13401347
+ .callback = mlxplat_dmi_l1_scale_out_switch_matched,
13411348
+ .matches = {
13421349
+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0021"),
@@ -1370,11 +1377,10 @@ index 4be0f29..8690660 100644
13701377
+ DMI_MATCH(DMI_BOARD_NAME, "VMOD0021"),
13711378
+ },
13721379
+ },
1373-
+ {
1380+
{
13741381
.callback = mlxplat_dmi_msn274x_matched,
13751382
.matches = {
1376-
DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"),
1377-
@@ -9253,8 +10172,8 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr)
1383+
@@ -9253,8 +10178,8 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr)
13781384
int shift, i;
13791385

13801386
/* Scan adapters from expected id to verify it is free. */
@@ -1385,7 +1391,7 @@ index 4be0f29..8690660 100644
13851391
mlxplat_max_adap_num; i++) {
13861392
search_adap = i2c_get_adapter(i);
13871393
if (search_adap) {
1388-
@@ -9263,7 +10182,7 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr)
1394+
@@ -9263,7 +10188,7 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr)
13891395
}
13901396

13911397
/* Return if expected parent adapter is free. */
@@ -1394,7 +1400,7 @@ index 4be0f29..8690660 100644
13941400
return 0;
13951401
break;
13961402
}
1397-
@@ -9285,7 +10204,7 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr)
1403+
@@ -9285,7 +10210,7 @@ static int mlxplat_mlxcpld_verify_bus_topology(int *nr)
13981404
}
13991405

14001406
/* Shift bus only if mux provided by 'mlxplat_mux_data'. */
@@ -1404,5 +1410,5 @@ index 4be0f29..8690660 100644
14041410

14051411
return 0;
14061412
--
1407-
2.8.4
1413+
2.20.1
14081414

‎recipes-kernel/linux/linux-5.10/9007-platform-mellanox-mlx-platform-Change-register-0x28-.patch‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,8 @@
1-
From 61b5d56ae93d68c12a66822add15864e774baab5 Mon Sep 17 00:00:00 2001
1+
From f5e18518ee52c9f17d033fd2a3cc899558ba4e07 Mon Sep 17 00:00:00 2001
22
From: Felix Radensky <[email protected]>
33
Date: Mon, 13 Jan 2025 12:49:33 +0200
4-
Subject: platform: mellanox: mlx-platform: Change register 0x28 name
4+
Subject: [PATCH 4/5] platform: mellanox: mlx-platform: Change register 0x28
5+
name
56

67
Register 0x28 was repurposed on new systems. Change its name
78
to correctly reflect the new functionality.
@@ -13,7 +14,7 @@ Reviewed-by: Vadim Pasternak <[email protected]>
1314
1 file changed, 3 insertions(+), 4 deletions(-)
1415

1516
diff --git a/drivers/platform/mellanox/mlx-platform.c b/drivers/platform/mellanox/mlx-platform.c
16-
index c0d2d0378..6767e58f4 100644
17+
index f33aca457..86a69e726 100644
1718
--- a/drivers/platform/mellanox/mlx-platform.c
1819
+++ b/drivers/platform/mellanox/mlx-platform.c
1920
@@ -53,7 +53,7 @@
@@ -25,15 +26,15 @@ index c0d2d0378..6767e58f4 100644
2526
#define MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION 0x2a
2627
#define MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET 0x2b
2728
#define MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET 0x2d
28-
@@ -8066,7 +8066,6 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
29+
@@ -8463,7 +8463,6 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
2930
case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET:
3031
case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET:
3132
case MLXPLAT_CPLD_LPC_REG_LED8_OFFSET:
3233
- case MLXPLAT_CPLD_LPC_REG_LED9_OFFSET:
3334
case MLXPLAT_CPLD_LPC_REG_GP0_OFFSET:
3435
case MLXPLAT_CPLD_LPC_REG_GP_RST_OFFSET:
3536
case MLXPLAT_CPLD_LPC_REG_GP1_OFFSET:
36-
@@ -8198,7 +8197,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
37+
@@ -8595,7 +8594,7 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
3738
case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET:
3839
case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET:
3940
case MLXPLAT_CPLD_LPC_REG_LED8_OFFSET:
@@ -42,7 +43,7 @@ index c0d2d0378..6767e58f4 100644
4243
case MLXPLAT_CPLD_LPC_REG_FAN_DIRECTION:
4344
case MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET:
4445
case MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET:
45-
@@ -8398,7 +8397,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
46+
@@ -8795,7 +8794,7 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
4647
case MLXPLAT_CPLD_LPC_REG_LED6_OFFSET:
4748
case MLXPLAT_CPLD_LPC_REG_LED7_OFFSET:
4849
case MLXPLAT_CPLD_LPC_REG_LED8_OFFSET:
@@ -52,5 +53,5 @@ index c0d2d0378..6767e58f4 100644
5253
case MLXPLAT_CPLD_LPC_REG_GP0_RO_OFFSET:
5354
case MLXPLAT_CPLD_LPC_REG_GPCOM0_OFFSET:
5455
--
55-
2.34.1
56+
2.20.1
5657

0 commit comments

Comments
 (0)